Two Cryo-CMOS papers at ESSCIRC/ESSDERC 2019

The work of two of my Ph.D. students has been accepted for presentation at the coming ESSCIRC/ESSDERC conferences to be held in Krakow, Poland next September. Congratulations to Job and Pascal!

Job’s work is showing how to build a voltage reference in standard CMOS that can operate over the whole ultra-wide temperature range from 4 K to 300 K. And, for the first time, we are showing significant statistical data demonstrating the accuracy of such references down to cryogenic temperature.

In the other paper by Pascal, we focus on device characterization of CMOS transistors at cryogenic temperature. We extend our prior work on cryo-CMOS mismatch by showing the characterization of transistor mismatch over a wide range of operating regimes, from strong inversion down to weak inversion. In particular, weak inversion operation is very relevant as it allows for low-power operation,  as required in several power-limited cryogenic applications, such as quantum computing.

Both papers will be presented on the first day of the conference, on Tuesday morning and afternoon. See here.


  • Job van Staveren, Carmina Garcia Almudever, Giordano Scappucci, Menno Veldhorst, Masoud Babaie, Edoardo Charbon, Fabio Sebastiano, “Voltage References for the Ultra-Wide Temperature Range from 4.2K to 300K in 40-nm CMOS,” to be presented at ESSCIRC 2019.
  • Pascal A. ‘T Hart, Masoud Babaie, Edoardo Charbon, Andrei Vladimirescu, Fabio Sebastiano, “Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures,” to be presented at ESSDERC 2019.

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