Research

Cryogenic & Precision Electronic Interfaces

My research goal is to interface integrated circuits with the world outside the silicon chip, both by building better sensor read-outs and by interacting with new computing devices. My research field is the design of analog and mixed-signal circuits. In the past, I have been working on sensor read-outs and integrated references, both in industry and academia. Currently, I am pushing the state-of-the-art of electronic interfaces for sensors and quantum devices. I will continue my quest in the future, by developing analog/mixed-signal electronics that will enable revolutionary applications, such as quantum computing.

Cryogenic interfaces

Quantum computers hold the promise to ignite the next technological revolution as the classical computer did for last century’s digital revolution, by efficiently solving problems that are intractable by today’s computers, such as large number factorization and simulation of quantum systems. Solid-state quantum processors must be typically cooled at cryogenic temperatures (<<1 K). In addition, a classical electronic controller is required to initialize, control and read out the quantum bits (qubits) at the core of the quantum processor. Currently, the most advanced quantum processors are equipped with less than 30 qubits, thus making it possible to connect a limited number of cables from the cryogenic refrigerator to a room-temperature electronic controller. However, quantum algorithms for practical applications require up to thousands or millions of qubits and of related connections, thus making the wiring to a room-temperature controller unpractical.

As an alternative, I propose a scalable CMOS electronic controller operating at cryogenic temperatures as close as possible to the quantum processor, in order to simplify the interconnect and to provide a solution scalable up to thousands of qubits.  Although building a cryogenic CMOS controller is feasible, there are several challenges to be addressed. First, there is not yet a standard cryogenic model that can be embedded in commercial design tools and valid in the GHz-frequency range and/or for nanometer CMOS technologies. Missing reliable models strongly restrain the use of advanced techniques and the complexity of any circuit design. Second, specific cryogenic design techniques must be developed to deal with non-idealities of CMOS devices at cryogenic temperatures. Third, the cooling power of state-of-the-art refrigerators is limited to a few Watts at 4 K and well below 1 W at sub-K temperatures. This poses a strict specification on the power consumption of the electronics, thus forcing the average power consumption of the cryogenic controller below a few milliwatt per qubit.

More information on my research on cryogenic interfaces for quantum computers.

In addition to quantum computing, advances in cryogenic electronics will also be employed in many other low temperature applications. Examples include cryogenic sensors and/or electronic read-outs for high-energy physics experiments, detectors for radio-astronomy, cryogenic probes for nuclear magnetic resonance (NMR) used in chemical and medical spectroscopy ,and instrumentation for spacecraft and orbiting observatories.

Precision interfaces

This part of my research focus on the design of analog and mixed/signal electronics not necessarily at cryogenic temperature. It is mostly related to the electornic interfaces required to bring the information from a sensor into an integrated circuit.

Frequency references

Some applications ask for replacing the standard crystal oscillator with a fully integrated alternative. There may be several reasons, such as costs, size of the whole system and robustness to mechanical shocks. In particular, nodes for the Internet-of-Things (IoT) must often be extremely small and very cheap, so that they can be deployed in large number without affecting the surrounding environment. For such an application, avoiding the bulky quartz crystal by using an integrated alternative with the same accuracy is the holy grail. I gave a detailed overview of this topic in my ISSCC short course in 2016.

In the past, I developed a frequency reference based on the mobility of a MOS transistor, and I studied how to optimize the communication and architecture of an IoT node to use such a reference [1, 2, 3, 4].

Currently, I am working both on RC-based frequency references and on thermal-diffusivity-based frequency references [5].

Temperature sensors

Integrated temperature sensors are required in several applications, from the measurement of environmental temperature to the compensation of other sensors’ cross-sensitivities.

In the past, I optimized temperature sensor for nanometer CMOS technologies, achieving a 10x improvement
in accuracy over the state-of-the-art and building a temperature sensors that isstill today the most accurate temperature sensor in a CMOS technology with feature size below 100 nm [6].

Currently, I am working on minimizing the area of temperature sensor for thermal-monitoring applications in SoC’s and microprocessors by using sensors based
on silicon thermal diffusivity [7]. Next to that, I am exploring new methods for tmeperature sensing based on measuring thermal noise.

Analog-to-Digital Converters

I am also working on analog-to-digital converters that combines an energy-efficient SAR converter and an high-accuracy ΣΔ converter to achieve state-of-the-art performance [8].

References

[1] [doi] F. Sebastiano, L. J. Breems, K. A. A. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, “A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios,” IEEE J. Solid-State Circuits, vol. 44, iss. 7, pp. 2002-2009, 2009.
[Bibtex]
@article{mine:jssc_2009_mobility,
title="A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less {ULP} Radios",
author="Fabio Sebastiano and Lucien J. Breems and Kofi A.A. Makinwa and Salvatore Drago and Domine M.W. Leenaerts and Bram Nauta",
journal=IEEE_J_JSSC,
year={2009},
month=jul,
volume={44},
number={7},
pages={2002 -2009},
abstract={The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented. The proposed low-voltage low-power circuit requires no off-chip components, making it suitable for application in wireless sensor networks (WSN). After a single-point calibration, the spread of its output frequency is less than 1.1% (3σ) over the temperature range from -22 °C to 85 °C . Fabricated in a baseline 65 nm CMOS technology, the frequency reference circuit occupies 0.11 mm² and draws 34 µA from a 1.2 V supply at room temperature.},
keywords={CMOS integrated circuits;MOSFET;wireless sensor networks;CMOS technology;MOS transistor;crystal-less ULP radios;current 34 muA;electron mobility;frequency 100 kHz;low-voltage low-power circuit;low-voltage mobility-based frequency reference;size 65 nm;temperature -22 degC to 85 degC;temperature 293 K to 298 K;voltage 1.2 V;wireless sensor networks;CMOS technology;Circuits;Electron mobility;Energy consumption;Frequency synchronization;MOSFETs;Oscillators;Silicon;Temperature sensors;Wireless sensor networks;CMOS analog integrated circuits;Charge carrier mobility;crystal-less clock;low voltage;relaxation oscillators;ultra-low power;wireless sensor networks},
doi={10.1109/JSSC.2009.2020247},
ISSN={0018-9200},
}
[2] [doi] F. Sebastiano, L. J. Breems, K. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, “A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor Networks,” IEEE J. Solid-State Circuits, vol. 46, iss. 7, pp. 1544-1552, 2011.
[Bibtex]
@ARTICLE{mine:jssc_2011_mobility_comp,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi Makinwa and Salvatore Drago and Domine M. W. Leenaerts and Bram Nauta",
journal=IEEE_J_JSSC,
title="A 65-nm {CMOS} temperature-compensated mobility-based frequency reference for Wireless Sensor Networks",
year={2011},
month=jul,
volume={46},
number={7},
pages={1544 - 1552},
abstract={A temperature-compensated CMOS frequency reference based on the electron mobility in a MOS transistor is presented. Over the temperature range from -55 °C to 125 °C, the frequency spread of the complete reference is less than ±0.5% after a two-point trim and less than ±2.7% after a one-point trim. These results make it suitable for use in Wireless Sensor Network nodes. Fabricated in a baseline 65-nm CMOS process, the 150 kHz frequency reference occupies 0.2 mm² and draws 42.6 µA from a 1.2-V supply at room temperature.},
keywords={CMOS integrated circuits;compensation;electron mobility;wireless sensor networks;MOS transistor;current 42.6 muA;electron mobility;mobility-based frequency reference;size 65 nm;temperature -55 degC to 125 degC;temperature-compensated CMOS frequency reference;two-point trim;voltage 1.2 V;wireless sensor networks;Accuracy;Frequency conversion;Oscillators;Temperature;Temperature measurement;Temperature sensors;Wireless sensor networks;CMOS integrated circuits;Charge carrier mobility;MOSFET;crystal-less clock;frequency reference;low voltage;sigma-delta modulation;smart sensors;temperature compensation;temperature sensors;ultra-low power;wireless sensor networks},
doi={10.1109/JSSC.2011.2143630},
ISSN={0018-9200}
}
[3] [doi] S. Drago, F. Sebastiano, L. J. Breems, D. M. W. Leenaerts, K. A. A. Makinwa, and B. Nauta, “Impulse-Based Scheme for Crystal-Less ULP Radios,” IEEE Trans. Circuits Syst. I, vol. 56, iss. 5, pp. 1041-1052, 2009.
[Bibtex]
@ARTICLE{mine:tcasi_2009_wsn,
author={Salvatore Drago and Fabio Sebastiano and Lucien J. Breems and Domine M.W. Leenaerts and Kofi A.A. Makinwa and Bram Nauta},
journal=IEEE_J_CASI,
title="Impulse-Based Scheme for Crystal-Less {ULP} Radios",
year={2009},
month=may,
volume={56},
number={5},
pages={1041 - 1052},
abstract={This study describes a method of implementing a fully integrated ultra-low-power (ULP) radio for wireless sensor networks (WSNs). This is achieved using an ad hoc modulation scheme (impulse radio), with a bandwidth of 17.7 MHz in the 2.4 GHz-ISM band and a specific medium access control (MAC) protocol, based on a duty-cycled wake-up radio and a crystal-less clock generator. It is shown that the total average power consumption is expected to be less than 100 µW with a clock generator inaccuracy of only 1%.},
keywords={access protocols;ad hoc networks;clocks;low-power electronics;modulation;ultra wideband communication;wireless sensor networks;ad hoc modulation;crystal-less ULP radio;crystal-less clock generator;duty-cycled wake-up radio;frequency 17.7 MHz;frequency 2.4 GHz;impulse radio;medium access control protocol;power 100 muW;ultra-low-power radio;wireless sensor network;Crystal-less clock;EDICS Category: COMM110A5, COMM200, COMM250A5;impulse radio;ultra-low power (ULP);wake-up radio;wireless sensor network (WSN)},
doi={10.1109/TCSI.2009.2015208},
ISSN={1549-8328}
}
[4] F. Sebastiano, L. J. Breems, and K. A. A. Makinwa, Mobility-based Time References for Wireless Sensor Networks, Springer, 2013.
[Bibtex]
@book{mine:book_mobility,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi A.A. Makinwa",
title = "Mobility-based Time References for Wireless Sensor Networks",
publisher = "Springer",
year = "2013",
abstract  = {This book describes the use of low-power low-cost and extremely small radios to provide essential time reference for wireless sensor networks. The authors explain how to integrate such radios in a standard CMOS process to reduce both cost and size, while focusing on the challenge of designing a fully integrated time reference for such radios. To enable the integration of the time reference, system techniques are proposed and analyzed, several kinds of integrated time references are reviewed, and mobility-based references are identified as viable candidates to provide the required accuracy at low-power consumption. Practical implementations of a mobility-based oscillator and a temperature sensor are also presented, which demonstrate the required accuracy over a wide temperature range, while drawing 51-µW from a 1.2-V supply in a 65-nm CMOS process.}
}
[5] L. Pedalà, &. Gürleyük, S. Pan, F. Sebastiano, and K. A. A. Makinwa, “A Frequency-Locked Loop Based on an Oxide Electrothermal Filter in Standard CMOS,” in Proc. European Solid-State Circuits Conference, Leuven, Belgium, 2017.
[Bibtex]
@INPROCEEDINGS{mine:esscirc_2017_lorenzo,
author = "Lorenzo Pedalà and Çagri Gürleyük and Sining Pan and Fabio Sebastiano and Kofi A.A. Makinwa",
booktitle="Proc. {European Solid-State Circuits Conference}",
title="A Frequency-Locked Loop Based on an Oxide Electrothermal Filter in Standard {CMOS}",
year={2017},
month=sep,
address="Leuven, Belgium",
pages={},
abstract={},
keywords={},
doi={},
ISSN={}
}
[6] [doi] F. Sebastiano, L. J. Breems, K. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, “A 1.2-V 10-µW NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 °C (3σ) From -70 °C to 125 °C,” IEEE J. Solid-State Circuits, vol. 45, iss. 12, pp. 2591-2601, 2010.
[Bibtex]
@ARTICLE{mine:jssc_2010_temp_sens,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi Makinwa and Salvatore Drago and Domine M. W. Leenaerts and Bram Nauta",
journal=IEEE_J_JSSC,
title="A 1.2-{V} 10-µ{W} {NPN}-Based Temperature Sensor in 65-nm {CMOS} With an Inaccuracy of 0.2 °{C} (3σ) From -70 °{C} to 125 °{C}",
year={2010},
month=dec,
volume={45},
number={12},
pages={2591 - 2601},
abstract={An NPN-based temperature sensor with digital output has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of (3σ) and a trimmed inaccuracy of (3σ) over the temperature range from -70 °C to 125 °C. This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e., correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 µA from a 1.2-V supply and occupies an area of 0.1 mm².},
keywords={CMOS integrated circuits;correlation methods;signal sampling;temperature sensors;CMOS;correlated double sampling;dynamic element matching;npn transistor;power 10 muW;size 65 nm;temperature -70 C to 125 C;temperature sensor;voltage 1.2 V;CMOS analog integrated circuits;CMOS process;Intelligent sensors;Sigma delta modulation;Temperature sensors;CMOS analog integrated circuits;sigma-delta modulation;smart sensors;temperature sensors},
doi={10.1109/JSSC.2010.2076610},
ISSN={0018-9200}
}
[7] [doi] U. Sönmez, F. Sebastiano, and K. A. A. Makinwa, “Compact Thermal-Diffusivity-Based Temperature Sensors in 40-nm CMOS for SoC Thermal Monitoring,” IEEE Journal of Solid-State Circuits, vol. 52, iss. 3, pp. 834-843, 2017.
[Bibtex]
@ARTICLE{mine:jssc_ugur_2017,
author={Ugur Sönmez and Fabio Sebastiano and Kofi A. A. Makinwa},
journal={IEEE Journal of Solid-State Circuits},
title={Compact Thermal-Diffusivity-Based Temperature Sensors in 40-nm CMOS for SoC Thermal Monitoring},
year={2017},
volume={52},
number={3},
pages={834-843},
abstract={An array of temperature sensors based on the thermal diffusivity (TD) of bulk silicon has been realized in a standard 40-nm CMOS process. In each TD sensor, a highly digital voltage-controlled oscillator-based S? ADC digitizes the temperature-dependent phase shift of an electrothermal filter (ETF). A phase calibration scheme is used to cancel the ADC's phase offset. Two types of ETF were realized, one optimized for accuracy and one optimized for resolution. Sensors based on the accuracy-optimized ETF achieved a resolution of 0.36 °C (rms) at 1 kSa/s, and inaccuracies of 1.4 °C (3σ, uncalibrated) and 0.75 °C (3s, room-temperature calibrated) from -40 °C to 125 °C. Sensors based on the resolution-optimized ETFs achieved an improved resolution of 0.21 C (rms), and inaccuracies of 2.3 °C (3σ, uncalibrated) and 1.05 °C (3σ, room-temperature calibrated). The sensors draw 2.8 mA from supply voltages as low as 0.9 V, and occupy only 1650 m2, making them some of the smallest smart temperature sensors reported to date, and well suited for thermal monitoring applications in systems-on-chip.},
keywords={CMOS integrated circuits;sigma-delta modulation;system-on-chip;temperature sensors;thermal diffusivity;voltage-controlled oscillators;CMOS process;SoC thermal monitoring;accuracy-optimized ETF;bulk silicon;current 2.8 mA;electrothermal filter;phase calibration scheme;resolution-optimized ETF;size 40 nm;smart temperature sensors;systems-on-chip;temperature -40 C to 125 C;temperature-dependent phase shift;thermal diffusivity;voltage 0.9 V;voltage-controlled oscillator-based S? ADC;Calibration;Heating;Intelligent sensors;Temperature sensors;Voltage-controlled oscillators;Phase-to-digital converter;temperature sensors;thermal diffusivity (TD);thermal monitoring;voltage-controlled oscillator (VCO)-based sigmadelta modulator},
doi={10.1109/JSSC.2016.2646798},
ISSN={0018-9200},
month={Mar}}
[8] [doi] B. Gönen, F. Sebastiano, R. Quan, R. van Veldhoven, and K. A. A. Makinwa, “A Dynamic Zoom ADC With 109-dB DR for Audio Applications,” IEEE Journal of Solid-State Circuits, vol. 52, iss. 6, pp. 1542-1550, 2017.
[Bibtex]
@ARTICLE{mine:jssc_2017_burak,
author={Burak Gönen and Fabio Sebastiano and Rui Quan and Robert van Veldhoven and Kofi A.A. Makinwa},
journal={IEEE Journal of Solid-State Circuits},
title={A Dynamic Zoom ADC With 109-dB DR for Audio Applications},
year={2017},
volume={52},
number={6},
pages={1542-1550},
abstract={This paper presents the first dynamic zoom ADC. Intended for audio applications, it achieves 109-dB DR, 106-dB signal-to-noise ratio, and 103-dB SNDR in a 20-kHz bandwidth, while dissipating only 1.12 mW. This translates into the state-of-the-art energy efficiency as expressed by a Schreier FoM of 181.5 dB. It also achieves the state-of-the-art area efficiency, occupying only 0.16 mm² in the 0.16-µm CMOS. These advances are enabled by the use of concurrent fine and coarse conversions, dynamic error-correction techniques, and a dynamically biased inverter-based operational transconductance amplifier.},
keywords={CMOS integrated circuits;analogue-digital conversion;audio signal processing;error correction;invertors;operational amplifiers;CMOS;Schreier FoM;area efficiency;audio applications;bandwidth 20 kHz;coarse conversions;concurrent fine conversions;dynamic error-correction techniques;dynamic zoom ADC;dynamically biased inverter;energy efficiency;operational transconductance amplifier;power 1.12 mW;signal-to-noiseratio;size 0.16 mum;Bandwidth;Dynamic range;Linearity;Quantization (signal);Signal resolution;Signal to noise ratio;Vehicle dynamics;Audio;compact ADC;delta sigma;discrete time;dynamic;dynamic range (DR);hybrid ADC;precision;zoom ADC},
doi={10.1109/JSSC.2017.2669022},
ISSN={0018-9200},
month={June}
}